• University of California, Irvine

• EECS 5141

DSP in VLSI Design

Homework (VII)

Systolic Architecture Design

1. This problem addresses systolic architecture design for matrix-vector multiplication. In this problem, we assume that each processing element can only access its local memory and the elements in matrix A are constant. Consider the following matrixvector multiplication:

Its data dependency graph is shown in the following figure, where the element aji of the coefficient matrix A is stored at position (i, j).

(a) Draw the space-time representation and the systolic architecture for the

matrix-vector multiplication using

dT=[1 0], pT=[0 1], sT=[1 1].

Assume that storage is localized to each processing element. Explicitly show the contents of local memory.

(b) Map the same DG with different mapping vectors:

i. dT=[1 1], pT=[1 -1], sT=[1 0]. ii. dT=[1 1], pT=[1 -1], sT=[0 1].

We have three architectures now, including these two architectures and the one

in (a). Do you think which one is better? Why?

(c) Use the mapping vector in (a). If the elements in matrix A are not constant.

Derive the systolic architecture.

(a)