• Viqarunnnisa Noon School and College

• HIS 101

CSE260 Lab Project
Topic: Asynchronous Counter Simulation

Introduction:
The Asynchronous Counter System is the name of the project. As frequency dividers,
asynchronous counters are utilized. A counter is a device that keeps track of the number of times
an event occurs. This counter, which is driven by a clock signal, is capable of counting and
recording the occurrences of any given event or process within a digital logic system or
computer. Asynchronous is a term that refers to a lack of synchronization. Something that is both
present and absent simultaneously. Asynchronous indicates that the operation time is managed
by delivering a pulse only when the preceding operation is complete, rather than at regular
intervals across a computer or communications stream. An asynchronous counter can be counted
using the asynchronous clock input. Simple counters can be constructed using flip-flops. Because
the count is reliant on the clock signal, an asynchronous counter uses changing state bits as the
clock signal for succeeding flip-flops. Because the Flip-flops are serially linked, the clock pulse
ripples across the counter.
Proposed Model:
1. The project is titled Asynchronous Counter System.
2. We created a three-bit counter that counts up to seven (highest value of 3 bit).
3. It is a device that can count any event based on the number of times it has occurred.
4. Asynchronous counters are simple to construct using flip-flops. They can be implemented by
increasing the count. A JK flip flop is utilized to construct the circuit in this project.
Experimental Setup:
1.To begin, we select three JK flip-flops (74107) from the component library to serve as the 3-bit
counters. We can construct much more than a three-bit counter. In this instance, we will require
more than three flip flops. For instance, if we want to build an 8-bit counter, we will want eight
flip flops.
2. We stacked three flip flops on top of one another. The flip flop on the right will be utilized as
the Least Significant bit, while the flip flop on the left will be the most significant bit. The J and
K are held high, as are the resets of each flip flop. Otherwise, the counter will not function